BibTeX record conf/isscc/ParikhKHJTMWKSY13

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@inproceedings{DBLP:conf/isscc/ParikhKHJTMWKSY13,
  author       = {Samir Parikh and
                  Tony Kao and
                  Yasuo Hidaka and
                  Jian Jiang and
                  Asako Toda and
                  Scott McLeod and
                  William W. Walker and
                  Yoichi Koyanagi and
                  Toshiyuki Shibuya and
                  Jun Yamada},
  title        = {A 32Gb/s wireline receiver with a low-frequency equalizer, {CTLE}
                  and 2-tap {DFE} in 28nm {CMOS}},
  booktitle    = {2013 {IEEE} International Solid-State Circuits Conference - Digest
                  of Technical Papers, {ISSCC} 2013, San Francisco, CA, USA, February
                  17-21, 2013},
  pages        = {28--29},
  publisher    = {{IEEE}},
  year         = {2013},
  url          = {https://doi.org/10.1109/ISSCC.2013.6487622},
  doi          = {10.1109/ISSCC.2013.6487622},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ParikhKHJTMWKSY13.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}