BibTeX record conf/isscc/NakajimaNDNHYMK06

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@inproceedings{DBLP:conf/isscc/NakajimaNDNHYMK06,
  author       = {Masami Nakajima and
                  Hideyuki Noda and
                  Katsumi Dosaka and
                  Kiyoshi Nakata and
                  Motoki Higashida and
                  Osamu Yamamoto and
                  Katsuya Mizumoto and
                  Hiroyuki Kondo and
                  Yukihiko Shimazu and
                  Kazutami Arimoto and
                  Kazunori Saitoh and
                  Toru Shimizu},
  title        = {A 40GOPS 250mW massively parallel processor based on matrix architecture},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {1616--1625},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696216},
  doi          = {10.1109/ISSCC.2006.1696216},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/NakajimaNDNHYMK06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}