BibTeX record conf/isscc/FujisawaKKNRNFY06

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@inproceedings{DBLP:conf/isscc/FujisawaKKNRNFY06,
  author       = {Hiroki Fujisawa and
                  Shuichi Kubouchi and
                  Koji Kuroki and
                  Naohisa Nishioka and
                  Yoshiro Riho and
                  Hiromasa Noda and
                  Isamu Fujii and
                  Hideyuki Yoko and
                  Ryuuji Takishita and
                  Takahiro Ito and
                  Hitoshi Tanaka and
                  Masayuki Nakamura},
  title        = {An 8.4ns Column-Access 1.3Gb/s/pin {DDR3} {SDRAM} with an 8: 4 Multiplexed
                  Data-Transfer Scheme},
  booktitle    = {2006 {IEEE} International Solid State Circuits Conference, {ISSCC}
                  2006, Digest of Technical Papers, an Francisco, CA, USA, February
                  6-9, 2006},
  pages        = {557--566},
  publisher    = {{IEEE}},
  year         = {2006},
  url          = {https://doi.org/10.1109/ISSCC.2006.1696092},
  doi          = {10.1109/ISSCC.2006.1696092},
  timestamp    = {Mon, 09 Aug 2021 14:54:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/FujisawaKKNRNFY06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}