<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/isscc/DitlowMSDEFFHMNOSWC11" mdate="2011-09-30">
<author>Gary S. Ditlow</author>
<author>Robert K. Montoye</author>
<author>Salvatore N. Storino</author>
<author>Sherman M. Dance</author>
<author>Sebastian Ehrenreich</author>
<author>Bruce M. Fleischer</author>
<author>Thomas W. Fox</author>
<author>Kyle M. Holmes</author>
<author>Junichi Mihara</author>
<author>Yutaka Nakamura</author>
<author>Shohji Onishi</author>
<author>Robert Shearer</author>
<author>Dieter Wendel</author>
<author>Leland Chang</author>
<title>A 4R2W register file for a 2.3GHz wire-speed POWER&#8482; processor with double-pumped write operation.</title>
<pages>256-258</pages>
<year>2011</year>
<booktitle>ISSCC</booktitle>
<ee>http://dx.doi.org/10.1109/ISSCC.2011.5746308</ee>
<crossref>conf/isscc/2011</crossref>
<url>db/conf/isscc/isscc2011.html#DitlowMSDEFFHMNOSWC11</url>
</inproceedings>
</dblp>
