BibTeX record: conf/isscc/DigheVAKJBHTEBDB10

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@inproceedings{DBLP:conf/isscc/DigheVAKJBHTEBDB10,
  author    = {Saurabh Dighe and
               Sriram R. Vangal and
               Paolo A. Aseron and
               Shasi Kumar and
               Tiju Jacob and
               Keith A. Bowman and
               Jason Howard and
               James Tschanz and
               Vasantha Erraguntla and
               Nitin Borkar and
               Vivek De and
               Shekhar Borkar},
  title     = {Within-die variation-aware dynamic-voltage-frequency scaling core
               mapping and thread hopping for an 80-core processor},
  booktitle = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
               Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
               2010},
  year      = {2010},
  pages     = {174--175},
  crossref  = {DBLP:conf/isscc/2010},
  url       = {http://dx.doi.org/10.1109/ISSCC.2010.5433997},
  doi       = {10.1109/ISSCC.2010.5433997},
  timestamp = {Sun, 21 Sep 2014 02:10:00 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/isscc/DigheVAKJBHTEBDB10},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}
@proceedings{DBLP:conf/isscc/2010,
  title     = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2010,
               Digest of Technical Papers, San Francisco, CA, USA, 7-11 February,
               2010},
  year      = {2010},
  publisher = {{IEEE}},
  url       = {http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5428240},
  isbn      = {978-1-4244-6033-5},
  timestamp = {Sun, 21 Sep 2014 02:10:00 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/isscc/2010},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}