BibTeX record conf/isscc/ChenLL22a

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@inproceedings{DBLP:conf/isscc/ChenLL22a,
  author       = {Chen Chen and
                  Jin Liu and
                  Hoi Lee},
  title        = {A 2.5-5MHz 87{\%} Peak Efficiency 48V-to-1V Integrated Hybrid {DC-DC}
                  Converter Adopting Ladder {SC} Network with Capacitor-Assisted Dual-Inductor
                  Filtering},
  booktitle    = {{IEEE} International Solid-State Circuits Conference, {ISSCC} 2022,
                  San Francisco, CA, USA, February 20-26, 2022},
  pages        = {234--236},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISSCC42614.2022.9731764},
  doi          = {10.1109/ISSCC42614.2022.9731764},
  timestamp    = {Thu, 16 Jun 2022 19:32:56 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/ChenLL22a.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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