Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs.

David Zaretsky Gaurav Mittal Robert P. Dick Prith Banerjee Balanced Scheduling and Operation Chaining in High-Level Synthesis for FPGA Designs. 595-601 2007 conf/isqed/2007 ISQED http://doi.ieeecomputersociety.org/10.1109/ISQED.2007.41 db/conf/isqed/isqed2007.html#ZaretskyMDB07