BibTeX record conf/isqed/YasufukuHPZTSFMNSTS12

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@inproceedings{DBLP:conf/isqed/YasufukuHPZTSFMNSTS12,
  author       = {Tadashi Yasufuku and
                  Koji Hirairi and
                  Yu Pu and
                  Yun Fei Zheng and
                  Ryo Takahashi and
                  Masato Sasaki and
                  Hiroshi Fuketa and
                  Atsushi Muramatsu and
                  Masahiro Nomura and
                  Hirofumi Shinohara and
                  Makoto Takamiya and
                  Takayasu Sakurai},
  editor       = {Keith A. Bowman and
                  Kamesh V. Gadepally and
                  Pallab Chatterjee and
                  Mark M. Budnik and
                  Lalitha Immaneni},
  title        = {24{\%} Power reduction by post-fabrication dual supply voltage control
                  of 64 voltage domains in V\({}_{\mbox{DDmin}}\) limited ultra low
                  voltage logic circuits},
  booktitle    = {Thirteenth International Symposium on Quality Electronic Design, {ISQED}
                  2012, Santa Clara, CA, USA, March 19-21, 2012},
  pages        = {586--591},
  publisher    = {{IEEE}},
  year         = {2012},
  url          = {https://doi.org/10.1109/ISQED.2012.6187553},
  doi          = {10.1109/ISQED.2012.6187553},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/YasufukuHPZTSFMNSTS12.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}