Low Voltage Test in Place of Fast Clock in DDSI Delay Test.

Haihua Yan Gefu Xu Adit D. Singh Low Voltage Test in Place of Fast Clock in DDSI Delay Test. 316-320 2005 conf/isqed/2005 ISQED http://doi.ieeecomputersociety.org/10.1109/ISQED.2005.75 db/conf/isqed/isqed2005.html#YanXS05