BibTeX record conf/isqed/HuangCHC15

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@inproceedings{DBLP:conf/isqed/HuangCHC15,
  author       = {Ya{-}Chi Huang and
                  Meng{-}Hsueh Chiang and
                  Wei{-}Chou Hsu and
                  Shiou{-}Ying Cheng},
  title        = {6-T {SRAM} performance assessment with stacked silicon nanowire MOSFETs},
  booktitle    = {Sixteenth International Symposium on Quality Electronic Design, {ISQED}
                  2015, Santa Clara, CA, USA, March 2-4, 2015},
  pages        = {610--614},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISQED.2015.7085497},
  doi          = {10.1109/ISQED.2015.7085497},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/HuangCHC15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}