BibTeX record conf/isqed/ChenLG0C20

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@inproceedings{DBLP:conf/isqed/ChenLG0C20,
  author       = {Jinbo Chen and
                  Keren Liu and
                  Xiaochen Guo and
                  Patrick Girard and
                  Yuanqing Cheng},
  title        = {{DOVA:} {A} Dynamic Overwriting Voltage Adjustment for {STT-RAM} {L1}
                  Cache},
  booktitle    = {21st International Symposium on Quality Electronic Design, {ISQED}
                  2020, Santa Clara, CA, USA, March 25-26, 2020},
  pages        = {408--414},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISQED48828.2020.9137020},
  doi          = {10.1109/ISQED48828.2020.9137020},
  timestamp    = {Wed, 22 Jul 2020 15:07:04 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/ChenLG0C20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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