BibTeX record conf/ispan/SakakibaraKIYTT94

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@inproceedings{DBLP:conf/ispan/SakakibaraKIYTT94,
  author       = {Tadayuki Sakakibara and
                  Katsuyoshi Kitai and
                  Tadaaki Isobe and
                  Shigeko Yazawa and
                  Teruo Tanaka and
                  Yoshiko Tamaki and
                  Yasuhiro Inagami},
  title        = {An interprocessor memory access arbitrating scheme for the {S-3800}
                  vector supercomputer},
  booktitle    = {International Symposium on Parallel Architectures, Algorithms and
                  Networks, {ISPAN} 1994, Kanazawa, Japan, December 14-16, 1994},
  pages        = {262--269},
  publisher    = {{IEEE} Computer Society},
  year         = {1994},
  url          = {https://doi.org/10.1109/ISPAN.1994.367140},
  doi          = {10.1109/ISPAN.1994.367140},
  timestamp    = {Fri, 24 Mar 2023 00:03:17 +0100},
  biburl       = {https://dblp.org/rec/conf/ispan/SakakibaraKIYTT94.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}