BibTeX record conf/ispan/GoossensV96

download as .bib file

@inproceedings{DBLP:conf/ispan/GoossensV96,
  author       = {Bernard Goossens and
                  Duc Thang Vu},
  title        = {Multithreading to Improve Cycle Width and {CPI} in Superpipelined
                  Superscalar Processors},
  booktitle    = {1996 International Symposium on Parallel Architectures, Algorithms
                  and Networks {(ISPAN} '96), June 12-14, 1996, Beijing, China},
  pages        = {36--42},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISPAN.1996.508958},
  doi          = {10.1109/ISPAN.1996.508958},
  timestamp    = {Fri, 24 Mar 2023 00:03:18 +0100},
  biburl       = {https://dblp.org/rec/conf/ispan/GoossensV96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.