![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/ispa/AbderazekSYS03
@inproceedings{DBLP:conf/ispa/AbderazekSYS03, author = {Ben A. Abderazek and Soichi Shigeta and Tsutomu Yoshinaga and Masahiro Sowa}, editor = {Minyi Guo and Laurence Tianruo Yang}, title = {On the Design of a Register Queue Based Processor Architecture (FaRM-rq)}, booktitle = {Parallel and Distributed Processing and Applications, International Symposium, {ISPA} 2003, Aizu, Japan, July 2-4, 2003, Proceedings}, series = {Lecture Notes in Computer Science}, volume = {2745}, pages = {248--262}, publisher = {Springer}, year = {2003}, url = {https://doi.org/10.1007/3-540-37619-4\_26}, doi = {10.1007/3-540-37619-4\_26}, timestamp = {Tue, 29 Dec 2020 18:35:20 +0100}, biburl = {https://dblp.org/rec/conf/ispa/AbderazekSYS03.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.