BibTeX record conf/ismvl/NiemannD22

download as .bib file

@inproceedings{DBLP:conf/ismvl/NiemannD22,
  author       = {Philipp Niemann and
                  Rolf Drechsler},
  title        = {Polynomial-Time Formal Verification of Adder Circuits for Multiple-Valued
                  Logic},
  booktitle    = {52nd {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  2022, Dallas, TX, USA, May 18-20, 2022},
  pages        = {9--14},
  publisher    = {{IEEE}},
  year         = {2022},
  url          = {https://doi.org/10.1109/ISMVL52857.2022.00009},
  doi          = {10.1109/ISMVL52857.2022.00009},
  timestamp    = {Sat, 30 Sep 2023 09:50:32 +0200},
  biburl       = {https://dblp.org/rec/conf/ismvl/NiemannD22.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
a service of  Schloss Dagstuhl - Leibniz Center for Informatics

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.