BibTeX record conf/ismvl/MuranakaAIM96

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@inproceedings{DBLP:conf/ismvl/MuranakaAIM96,
  author       = {Noriaki Muranaka and
                  Shigenobu Arai and
                  Shigeru Imanishi and
                  D. Michael Miller},
  title        = {A Ternary Systolic Product-Sum Circuit for GF(3m) using Neuron MOSFETs},
  booktitle    = {26th {IEEE} International Symposium on Multiple-Valued Logic, {ISMVL}
                  1996, Santiago de Compostela, Spain, May 29-31, 1996, Proceedings},
  pages        = {92--97},
  publisher    = {{IEEE} Computer Society},
  year         = {1996},
  url          = {https://doi.org/10.1109/ISMVL.1996.508342},
  doi          = {10.1109/ISMVL.1996.508342},
  timestamp    = {Thu, 23 Mar 2023 23:59:56 +0100},
  biburl       = {https://dblp.org/rec/conf/ismvl/MuranakaAIM96.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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