BibTeX record conf/islped/ShrideviACR15

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@inproceedings{DBLP:conf/islped/ShrideviACR15,
  author       = {Rajesh Jayashankara Shridevi and
                  Dean Michael Ancajas and
                  Koushik Chakraborty and
                  Sanghamitra Roy},
  title        = {Tackling voltage emergencies in NoC through timing error resilience},
  booktitle    = {{IEEE/ACM} International Symposium on Low Power Electronics and Design,
                  {ISLPED} 2015, Rome, Italy, July 22-24, 2015},
  pages        = {104--109},
  publisher    = {{IEEE}},
  year         = {2015},
  url          = {https://doi.org/10.1109/ISLPED.2015.7273498},
  doi          = {10.1109/ISLPED.2015.7273498},
  timestamp    = {Sun, 02 Oct 2022 16:09:51 +0200},
  biburl       = {https://dblp.org/rec/conf/islped/ShrideviACR15.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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