A methodology for analysis and verification of power gated circuits with correlated results.

Aveek Sarkar Shen Lin Kai Wang A methodology for analysis and verification of power gated circuits with correlated results. 351-354 2007 ISLPED http://doi.acm.org/10.1145/1283780.1283856 conf/islped/2007 db/conf/islped/islped2007.html#SarkarLW07