@inproceedings{DBLP:conf/islped/HirakiBKGNSSS96,
author = {Mitsuru Hiraki and
Raminder Singh Bajwa and
Hirotsugu Kojima and
Douglas J. Gorny and
Ken-ichi Nitta and
Avadhani Shridhar and
Katsuro Sasaki and
Koichi Seki},
title = {Stage-skip pipeline: a low power processor architecture
using a decoded instruction buffer},
booktitle = {ISLPED},
year = {1996},
pages = {353-358},
ee = {http://doi.acm.org/10.1145/252493.252634},
crossref = {DBLP:conf/islped/1996},
bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/islped/1996,
editor = {Mark Horowitz and
Jan M. Rabaey and
Brock Barton and
Massoud Pedram},
title = {Proceedings of the 1996 International Symposium on Low Power
Electronics and Design, 1996, Monterey, California, USA,
August 12-14, 1996},
booktitle = {ISLPED},
publisher = {IEEE},
year = {1996},
isbn = {0-7803-3571-6},
bibsource = {DBLP, http://dblp.uni-trier.de}
}