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BibTeX record conf/islped/HeZJG11
@inproceedings{DBLP:conf/islped/HeZJG11, author = {Xun He and Dajiang Zhou and Xin Jin and Satoshi Goto}, editor = {Naehyuck Chang and Hiroshi Nakamura and Koji Inoue and Kenichi Osada and Massimo Poncino}, title = {A 98 GMACs/W 32-core vector processor in 65nm {CMOS}}, booktitle = {Proceedings of the 2011 International Symposium on Low Power Electronics and Design, 2011, Fukuoka, Japan, August 1-3, 2011}, pages = {373--378}, publisher = {{IEEE/ACM}}, year = {2011}, url = {http://portal.acm.org/citation.cfm?id=2016891\&CFID=34981777\&CFTOKEN=25607807}, timestamp = {Sat, 11 Nov 2017 15:51:51 +0100}, biburl = {https://dblp.org/rec/conf/islped/HeZJG11.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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