![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
BibTeX record conf/ises/RaoD16
@inproceedings{DBLP:conf/ises/RaoD16, author = {A. G. Rao and A. K. D. Dwivedi}, title = {Design of {ESOP-RPLA} Array Using {DRG2} and {DRG4} Gates Based on Reversible Logic Technology}, booktitle = {{IEEE} International Symposium on Nanoelectronic and Information Systems, iNIS 2016, Gwalior, India, December 19-21, 2016}, pages = {218--223}, publisher = {{IEEE}}, year = {2016}, url = {https://doi.org/10.1109/iNIS.2016.058}, doi = {10.1109/INIS.2016.058}, timestamp = {Mon, 09 Aug 2021 14:54:02 +0200}, biburl = {https://dblp.org/rec/conf/ises/RaoD16.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.