BibTeX record conf/ised/SinghVK16

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@inproceedings{DBLP:conf/ised/SinghVK16,
  author       = {Raj Prakash Singh and
                  Ankit K. Vashishtha and
                  R. Krishna},
  title        = {32 Bit re-configurable {RISC} processor design and implementation
                  for {BETA} {ISA} with inbuilt matrix multiplier},
  booktitle    = {Sixth International Symposium on Embedded Computing and System Design,
                  {ISED} 2016, Patna, India, December 15-17, 2016},
  pages        = {112--116},
  publisher    = {{IEEE}},
  year         = {2016},
  url          = {https://doi.org/10.1109/ISED.2016.7977065},
  doi          = {10.1109/ISED.2016.7977065},
  timestamp    = {Wed, 16 Oct 2019 14:14:50 +0200},
  biburl       = {https://dblp.org/rec/conf/ised/SinghVK16.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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