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BibTeX record conf/ised/PalVPVM14
@inproceedings{DBLP:conf/ised/PalVPVM14, author = {Subhankar Pal and Chetan Vudadha and P. Sai Phaneendra and Sreehari Veeramachaneni and Srinivas B. Mandalika}, title = {A New Design of an N-Bit Reversible Arithmetic Logic Unit}, booktitle = {2014 Fifth International Symposium on Electronic System Design, Surathkal, Mangalore, India, December 15-17, 2014}, pages = {224--225}, publisher = {{IEEE} Computer Society}, year = {2014}, url = {https://doi.org/10.1109/ISED.2014.56}, doi = {10.1109/ISED.2014.56}, timestamp = {Mon, 08 Nov 2021 08:47:39 +0100}, biburl = {https://dblp.org/rec/conf/ised/PalVPVM14.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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