BibTeX record conf/iscas/YeTYS19

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@inproceedings{DBLP:conf/iscas/YeTYS19,
  author       = {Jinghao Ye and
                  Nozomu Togawa and
                  Masao Yanagisawa and
                  Youhua Shi},
  title        = {Static Error Analysis and Optimization of Faithfully Truncated Adders
                  for Area-Power Efficient {FIR} Designs},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2019,
                  Sapporo, Japan, May 26-29, 2019},
  pages        = {1--4},
  publisher    = {{IEEE}},
  year         = {2019},
  url          = {https://doi.org/10.1109/ISCAS.2019.8702386},
  doi          = {10.1109/ISCAS.2019.8702386},
  timestamp    = {Sun, 25 Oct 2020 23:14:46 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/YeTYS19.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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