Chien-Hsing Wu Chien-Ming Wu Ming-Der Shieh Yin-Tsung Hwang Systolic VLSI realization of a novel iterative division algorithm over GF(2m): a high-speed, low-complexity design. 33-36 2001 conf/iscas/2001 ISCAS (4) http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.922162 db/conf/iscas/iscas2001-4.html#WuWSH01