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BibTeX record conf/iscas/WongTC00
@inproceedings{DBLP:conf/iscas/WongTC00, author = {Bob Ka{-}Man Wong and Chi{-}Ying Tsui and Roger S.{-}K. Cheng}, title = {Low complexity {VLSI} implementation of a joint successive interference cancellation with interleaving scheme}, booktitle = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000, Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31 May 2000, Proceedings}, pages = {365--368}, publisher = {{IEEE}}, year = {2000}, url = {https://doi.org/10.1109/ISCAS.2000.856337}, doi = {10.1109/ISCAS.2000.856337}, timestamp = {Fri, 13 Aug 2021 09:26:01 +0200}, biburl = {https://dblp.org/rec/conf/iscas/WongTC00.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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