BibTeX record conf/iscas/WangCHZ20

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@inproceedings{DBLP:conf/iscas/WangCHZ20,
  author       = {Jue Wang and
                  Xu Cheng and
                  Jun Han and
                  Xiaoyang Zeng},
  title        = {A Synthesis Friendly VCO-Based Delta-Sigma {ADC} with Process Variation
                  Tolerance},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
                  Sevilla, Spain, October 10-21, 2020},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISCAS45731.2020.9180939},
  doi          = {10.1109/ISCAS45731.2020.9180939},
  timestamp    = {Tue, 19 Jan 2021 08:51:47 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/WangCHZ20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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