BibTeX record conf/iscas/UengYWWW08

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@inproceedings{DBLP:conf/iscas/UengYWWW08,
  author       = {Yeong{-}Luh Ueng and
                  Chung{-}Jay Yang and
                  Zong{-}Cheng Wu and
                  Chen{-}Eng Wu and
                  Yu{-}Lun Wang},
  title        = {{VLSI} decoding architecture with improved convergence speed and reduced
                  decoding latency for irregular {LDPC} codes in WiMAX},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
                  May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages        = {520--523},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCAS.2008.4541469},
  doi          = {10.1109/ISCAS.2008.4541469},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/UengYWWW08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}