Fast and low-power processor front-end with reduced rename logic circuit complexity.

Rama Sangireddy Fast and low-power processor front-end with reduced rename logic circuit complexity. 2006 conf/iscas/2006 ISCAS http://dx.doi.org/10.1109/ISCAS.2006.1692520 db/conf/iscas/iscas2006.html#Sangireddy06