Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems.

Kazuhiro Nakamura Masatoshi Yamamoto Kazuyoshi Takagi Naofumi Takagi Fast and memory efficient VLSI architecture for output probability computations of HMM-based recognition systems. 1688-1691 2008 ISCAS http://dx.doi.org/10.1109/ISCAS.2008.4541761 conf/iscas/2008 db/conf/iscas/iscas2008.html#NakamuraYTT08