MullerWSKS04'

BibTeX

@inproceedings{DBLP:conf/iscas/MullerWSKS04,
  author    = {Matthias M{\"u}ller and
               Andreas Wortmann and
               Sven Simon and
               Michael Kugel and
               Tim Schoenauer},
  title     = {The impact of clock gating schemes on the power dissipation
               of synthesizable register files},
  booktitle = {ISCAS (2)},
  year      = {2004},
  pages     = {609-612},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}