BibTeX record conf/iscas/KimLC10

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@inproceedings{DBLP:conf/iscas/KimLC10,
  author       = {Young{-}Hwa Kim and
                  Jaewon Lee and
                  SeongHwan Cho},
  title        = {A 10-bit 300MSample/s pipelined {ADC} using time-interleaved {SAR}
                  {ADC} for front-end stages},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2010), May
                  30 - June 2, 2010, Paris, France},
  pages        = {4041--4044},
  publisher    = {{IEEE}},
  year         = {2010},
  url          = {https://doi.org/10.1109/ISCAS.2010.5537646},
  doi          = {10.1109/ISCAS.2010.5537646},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimLC10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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