BibTeX record conf/iscas/KimKKKKKLLPSS18

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@inproceedings{DBLP:conf/iscas/KimKKKKKLLPSS18,
  author       = {Min{-}Su Kim and
                  Ah{-}Reum Kim and
                  Yong{-}geol Kim and
                  Chunghee Kim and
                  Dong{-}Yeop Kim and
                  Jong{-}Woo Kim and
                  Daeseong Lee and
                  Hyun Lee and
                  Jungyul Pyo and
                  Youngmin Shin and
                  Jae Cheol Son},
  title        = {Contention-Free High-Speed Clock-Gate based on Set/Reset Latch for
                  Wide Voltage Scaling},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2018,
                  27-30 May 2018, Florence, Italy},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2018},
  url          = {https://doi.org/10.1109/ISCAS.2018.8351444},
  doi          = {10.1109/ISCAS.2018.8351444},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/KimKKKKKLLPSS18.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}