BibTeX record conf/iscas/JiangLYH20

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@inproceedings{DBLP:conf/iscas/JiangLYH20,
  author       = {Weixiong Jiang and
                  Rui Li and
                  Heng Yu and
                  Yajun Ha},
  title        = {An Accurate {FPGA} Online Delay Monitor Supporting All Timing Paths},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2020,
                  Sevilla, Spain, October 10-21, 2020},
  pages        = {1--5},
  publisher    = {{IEEE}},
  year         = {2020},
  url          = {https://doi.org/10.1109/ISCAS45731.2020.9181070},
  doi          = {10.1109/ISCAS45731.2020.9181070},
  timestamp    = {Fri, 25 Mar 2022 16:50:40 +0100},
  biburl       = {https://dblp.org/rec/conf/iscas/JiangLYH20.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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