BibTeX record conf/iscas/JiangLW01

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@inproceedings{DBLP:conf/iscas/JiangLW01,
  author       = {Yi{-}He Jiang and
                  Jianbang Lai and
                  Ting{-}Chi Wang},
  title        = {Module placement with pre-placed modules using the B*-tree representation},
  booktitle    = {Proceedings of the 2001 International Symposium on Circuits and Systems,
                  {ISCAS} 2001, Sydney, Australia, May 6-9, 2001},
  pages        = {347--350},
  publisher    = {{IEEE}},
  year         = {2001},
  url          = {https://doi.org/10.1109/ISCAS.2001.922056},
  doi          = {10.1109/ISCAS.2001.922056},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JiangLW01.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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