BibTeX record conf/iscas/JeyasinghB08

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@inproceedings{DBLP:conf/iscas/JeyasinghB08,
  author       = {Rakesh Gnana David Jeyasingh and
                  Navakanta Bhat},
  title        = {A low power, process invariant keeper for high speed dynamic logic
                  circuits},
  booktitle    = {International Symposium on Circuits and Systems {(ISCAS} 2008), 18-21
                  May 2008, Sheraton Seattle Hotel, Seattle, Washington, {USA}},
  pages        = {1668--1671},
  publisher    = {{IEEE}},
  year         = {2008},
  url          = {https://doi.org/10.1109/ISCAS.2008.4541756},
  doi          = {10.1109/ISCAS.2008.4541756},
  timestamp    = {Wed, 16 Oct 2019 14:14:49 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/JeyasinghB08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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