BibTeX record: conf/iscas/ItohTSNTM05

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@inproceedings{DBLP:conf/iscas/ItohTSNTM05,
  author    = {Niichi Itoh and
               Yasumasa Tsukamoto and
               Takeshi Shibagaki and
               Koji Nii and
               Hidehiro Takata and
               Hiroshi Makino},
  title     = {A 32{\texttimes}24-bit multiplier-accumulator with advanced rectangular
               styled Wallace-tree structure},
  booktitle = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
               May 2005, Kobe, Japan},
  year      = {2005},
  pages     = {73--76},
  crossref  = {DBLP:conf/iscas/2005},
  url       = {http://dx.doi.org/10.1109/ISCAS.2005.1464527},
  doi       = {10.1109/ISCAS.2005.1464527},
  timestamp = {Wed, 22 Oct 2014 12:16:40 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/iscas/ItohTSNTM05},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}
@proceedings{DBLP:conf/iscas/2005,
  title     = {International Symposium on Circuits and Systems {(ISCAS} 2005), 23-26
               May 2005, Kobe, Japan},
  year      = {2005},
  publisher = {{IEEE}},
  timestamp = {Wed, 22 Oct 2014 12:16:40 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/iscas/2005},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}