A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length.

Renato Fernandes Hentschke Ricardo Reis A 3D-Via Legalization Algorithm for 3D VLSI Circuits and its Impact on Wire Length. 2036-2039 2007 conf/iscas/2007 ISCAS http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378497 db/conf/iscas/iscas2007.html#HentschkeR07