Design of a high performance 32×32-bit multiplier with a novel sign select Booth encoder.

Kiwon Choi Minkyu Song Design of a high performance 32×32-bit multiplier with a novel sign select Booth encoder. 701-704 2001 conf/iscas/2001 ISCAS (2) http://doi.ieeecomputersociety.org/10.1109/ISCAS.2001.921167 db/conf/iscas/iscas2001-2.html#ChoiS01