BibTeX record conf/iscas/ChiangC00

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@inproceedings{DBLP:conf/iscas/ChiangC00,
  author       = {Jen{-}Shiun Chiang and
                  Ming{-}Da Chiang},
  title        = {The design of a 1.5 V, 10-bit, 10 {M} samples/s low power pipelined
                  analog-to-digital converter},
  booktitle    = {{IEEE} International Symposium on Circuits and Systems, {ISCAS} 2000,
                  Emerging Technologies for the 21st Century, Geneva, Switzerland, 28-31
                  May 2000, Proceedings},
  pages        = {443--446},
  publisher    = {{IEEE}},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISCAS.2000.857126},
  doi          = {10.1109/ISCAS.2000.857126},
  timestamp    = {Fri, 13 Aug 2021 09:26:01 +0200},
  biburl       = {https://dblp.org/rec/conf/iscas/ChiangC00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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