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BibTeX record conf/iscas/ChenHC04
@inproceedings{DBLP:conf/iscas/ChenHC04, author = {Tung{-}Chien Chen and Yu{-}Wen Huang and Liang{-}Gee Chen}, title = {Analysis and design of macroblock pipelining for {H.264/AVC} {VLSI} architecture}, booktitle = {Proceedings of the 2004 International Symposium on Circuits and Systems, {ISCAS} 2004, Vancouver, BC, Canada, May 23-26, 2004}, pages = {273--276}, publisher = {{IEEE}}, year = {2004}, timestamp = {Wed, 16 Oct 2019 14:14:49 +0200}, biburl = {https://dblp.org/rec/conf/iscas/ChenHC04.bib}, bibsource = {dblp computer science bibliography, https://dblp.org} }
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