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DBLP Record 'conf/isca/ZhangA05'

BibTeX

@inproceedings{DBLP:conf/isca/ZhangA05,
  author    = {Michael Zhang and
               Krste Asanovic},
  title     = {Victim Replication: Maximizing Capacity while Hiding Wire
               Delay in Tiled Chip Multiprocessors},
  booktitle = {ISCA},
  year      = {2005},
  pages     = {336-345},
  ee        = {http://csdl.computer.org/comp/proceedings/isca/2005/2270/00/22700336abs.htm},
  crossref  = {DBLP:conf/isca/2005},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}
@proceedings{DBLP:conf/isca/2005,
  title     = {32st International Symposium on Computer Architecture (ISCA
               2005), 4-8 June 2005, Madison, Wisconsin, USA},
  booktitle = {ISCA},
  publisher = {IEEE Computer Society},
  year      = {2005},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

Copyright © 2005-05-20 by Michael Ley (ley@uni-trier.de)