A fault tolerant, area efficient architecture for Shor's factoring algorithm.

Mark Whitney Nemanja Isailovic Yatish Patel John Kubiatowicz A fault tolerant, area efficient architecture for Shor's factoring algorithm. 383-394 2009 ISCA http://doi.acm.org/10.1145/1555754.1555802 conf/isca/2009 db/conf/isca/isca2009.html#WhitneyIPK09