BibTeX record conf/isca/VenkatesanRVRR14

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@inproceedings{DBLP:conf/isca/VenkatesanRVRR14,
  author       = {Rangharajan Venkatesan and
                  Shankar Ganesh Ramasubramanian and
                  Swagath Venkataramani and
                  Kaushik Roy and
                  Anand Raghunathan},
  title        = {{STAG:} Spintronic-Tape Architecture for {GPGPU} cache hierarchies},
  booktitle    = {{ACM/IEEE} 41st International Symposium on Computer Architecture,
                  {ISCA} 2014, Minneapolis, MN, USA, June 14-18, 2014},
  pages        = {253--264},
  publisher    = {{IEEE} Computer Society},
  year         = {2014},
  url          = {https://doi.org/10.1109/ISCA.2014.6853233},
  doi          = {10.1109/ISCA.2014.6853233},
  timestamp    = {Fri, 24 Mar 2023 00:02:38 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/VenkatesanRVRR14.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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