BibTeX record conf/isca/SherwoodVC03

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@inproceedings{DBLP:conf/isca/SherwoodVC03,
  author       = {Timothy Sherwood and
                  George Varghese and
                  Brad Calder},
  editor       = {Allan Gottlieb and
                  Kai Li},
  title        = {A Pipelined Memory Architecture for High Throughput Network Processors},
  booktitle    = {30th International Symposium on Computer Architecture {(ISCA} 2003),
                  9-11 June 2003, San Diego, California, {USA}},
  pages        = {288--299},
  publisher    = {{IEEE} Computer Society},
  year         = {2003},
  url          = {https://doi.ieeecomputersociety.org/10.1109/ISCA.2003.1207008},
  doi          = {10.1109/ISCA.2003.1207008},
  timestamp    = {Fri, 24 Mar 2023 00:02:38 +0100},
  biburl       = {https://dblp.org/rec/conf/isca/SherwoodVC03.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}
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