BibTeX record conf/isca/SherwoodVC03

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@inproceedings{DBLP:conf/isca/SherwoodVC03,
  author    = {Timothy Sherwood and
               George Varghese and
               Brad Calder},
  title     = {A Pipelined Memory Architecture for High Throughput Network Processors},
  booktitle = {30th International Symposium on Computer Architecture {(ISCA} 2003),
               9-11 June 2003, San Diego, California, {USA}},
  pages     = {288--299},
  year      = {2003},
  crossref  = {DBLP:conf/isca/2003},
  url       = {http://doi.ieeecomputersociety.org/10.1109/ISCA.2003.1207008},
  doi       = {10.1109/ISCA.2003.1207008},
  timestamp = {Thu, 16 Oct 2014 17:35:15 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/isca/SherwoodVC03},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}
@proceedings{DBLP:conf/isca/2003,
  editor    = {Allan Gottlieb and
               Kai Li},
  title     = {30th International Symposium on Computer Architecture {(ISCA} 2003),
               9-11 June 2003, San Diego, California, {USA}},
  publisher = {{IEEE} Computer Society},
  year      = {2003},
  url       = {http://dl.acm.org/citation.cfm?id=859618},
  isbn      = {0-7695-1945-8},
  timestamp = {Thu, 16 Oct 2014 17:35:15 +0200},
  biburl    = {http://dblp.uni-trier.de/rec/bib/conf/isca/2003},
  bibsource = {dblp computer science bibliography, http://dblp.org}
}