<?xml version="1.0"?>
<dblp>
<inproceedings key="conf/isca/BarrosoGMNQSSSV00" mdate="2012-05-15">
<author>Luiz Andr&#233; Barroso</author>
<author>Kourosh Gharachorloo</author>
<author>Robert McNamara</author>
<author>Andreas Nowatzyk</author>
<author>Shaz Qadeer</author>
<author>Barton Sano</author>
<author>Scott Smith</author>
<author>Robert Stets</author>
<author>Ben Verghese</author>
<title>Piranha: a scalable architecture based on single-chip multiprocessing.</title>
<pages>282-293</pages>
<year>2000</year>
<crossref>conf/isca/2000</crossref>
<booktitle>ISCA</booktitle>
<ee>http://doi.acm.org/10.1145/339647.339696</ee>
<url>db/conf/isca/isca2000.html#BarrosoGMNQSSSV00</url>
</inproceedings>
</dblp>
