A Reconfigurable Low-Power High-Performance Matrix Multiplier Architecture with Borrow Parallel Counters.

Rong Lin A Reconfigurable Low-Power High-Performance Matrix Multiplier Architecture with Borrow Parallel Counters. 182 2003 conf/ipps/2003 IPDPS http://csdl.computer.org/comp/proceedings/ipdps/2003/1926/00/19260182aabs.htm db/conf/ipps/ipdps2003.html#Lin03