Yannick Monnet Marc Renaudin Régis Leveugle Formal Analysis of Quasi Delay Insensitive Circuits Behavior in the Presence of SEUs. 113-120 2007 conf/iolts/2007 IOLTS http://doi.ieeecomputersociety.org/10.1109/IOLTS.2007.33 db/conf/iolts/iolts2007.html#MonnetRL07