FPGA Implementation of Support Vector Machines with Pseudo-Logarithmic Number Representation.

Andrea Boni Alessandro Zorat FPGA Implementation of Support Vector Machines with Pseudo-Logarithmic Number Representation. 618-624 2006 IJCNN http://dx.doi.org/10.1109/IJCNN.2006.246740 conf/ijcnn/2006 db/conf/ijcnn/ijcnn2006.html#BoniZ06