@inproceedings{DBLP:conf/ifip10-5/AzemardAMA01,
  author    = {Nadine Az{\'e}mard and
               M. Aline and
               Philippe Maurine and
               Daniel Auvergne},
  title     = {Feasible Delay Bound Definition},
  booktitle = {VLSI-SOC},
  year      = {2001},
  pages     = {325-335},
  crossref  = {DBLP:conf/ifip10-5/2001},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}

@proceedings{DBLP:conf/ifip10-5/2001,
  editor    = {Michel Robert and
               Bruno Rouzeyre and
               Christian Piguet and
               Marie-Lise Flottes},
  title     = {SOC Design Methodologies, IFIP TC10/WG10.5 Eleventh International
               Conference on Very Large Scale Integration of Systems-on/Chip
               (VLSI-SOC'01), December 3-5, 2001, Montpellier, France},
  booktitle = {VLSI-SOC},
  publisher = {Kluwer},
  series    = {IFIP Conference Proceedings},
  volume    = {218},
  year      = {2002},
  isbn      = {1-4020-7148-5},
  bibsource = {DBLP, http://dblp.uni-trier.de}
}